why would it? the parent OS can already handle physically contiguous allocations so these should be no different (with the exception that a separate interface can be used to do compute over these buffers/pages).
If it requires physically contiguous RAM to work, then it's not really participating in the full virtual memory system, really. It would be using an exception to it, that can be accommodated to some extent by the OS, but not sitting in demand-paged storage like the rest of the system.
You could still do map-reduce operations, but for it to really fly, what you'd want is a side channel between the memory chips that allows the reduce to happen out of band from the front-side bus and the reduction to be sent to the CPU. And any workflow where you can stream the reduction to the CPU that would be even better for latency.
That really doesn't make sense because your system is already using memory that needs to be physically contiguous but mapped virtually. Also, would you say pinned memory is not part of the virtual memory system??
You're only restricted by the fragmentation of the system memory which is an issue yes, but it's dealt with in other ways.
Yes, however I do suspect that at some point comprehension trumps context. Meaning it will be evedent giving the ability to increase comprehension and retaining whatever context you have goes a long way. I dont have the ability to play such large models. Within the means of my hardware I have already playd around with LLM enough to know where balances will start to cause confliction. Priotizing effeciency within the accuracy. This can mean compromising some other aspect of the AI, or this can be viewed as a positive interoperability.
Consider context as hyper-dimensional coordinate vectors gesturing at the starting concept cluster of a synthesis chain or thread to unspool.
If the model's comprehensive training activated by your context locates the right thread to pull, this could be considered comprehension? That it "got" it?
The context is AI made some knowledge work less cushy so now some folks are trying to point out random imaginary flaws (e.g TP or "water usage") when they're not busy trying to convince everyone AI doesn't work.
> copper can barely support 10G and is terribly power hungry when it does that.
AFAIK, thunderbolt cables are also copper - so what trickery do they use for supporting USB4-80? i believe both connectors use differential pair wires for signalling.
It's simply length. Ethernet is expected to work on 50-100m runs, while USB4 specifies maximum cable lengths of 2m even for just 5gbps (at least for passive cables). 80gbps is 0.8m
The longer Thunderbolt (which is actually just USB4) cables internally use fiber optics for data transmission, with converters to copper in each connector. Even the medium-distance (3 meter) ones have signal quality boosters in each connector matched to the kind of signal degradation that kind of cable will experience.
Completely passive TB4/TB5 cables max out at about 80 centimeters.
Besides what retatop and crote said - USB4 uses either binary or PAM-3, 10GBASE-T uses PAM-16. Higher modulation means lower frequency bandwidth (so longer and/or crappier cable), but also more current-hungry line driver and more current required to keep noise manageable.
Half life alyx and their push for openVR has made a big impact in that part of the gaming world.
But yeah, their games are just as filled with lootbox, crates, skin garbage as other low effort money grabs; saving grace being its all cosmetics only (and they’re private about their financials).
